The present invention relates to semiconductor package fabrication processes, and in particular, to thin quad flat package no leads (QFN) fabrication methods.
Consumers are demanding that devices such as cell phones, personal digital assistants, and music players be more reliable, compact, and affordable. For example, consumers are requiring that their cell phones be ultra thin and reliable. This requires thinner packaging and fewer defects. Additionally, these low profile applications may also require power electronics which require some level of thermal dissipation from the package. Of course, these package features need to be available at an affordable price.
Present QFN packages are fabricated using standard methods using a lead frame and a die attach pad. These methods limit the thinness of the device and may introduce additional process elements which may be an additional source of potential defects. These additional process elements may add additional cost to the package fabrication. Present QFN package heat dissipation may be limited and may require additional space for heat sinking on the printed circuit board or substrate.
Thus, there is a need for improved package assembly methods. The present invention solves these and other problems by providing chip scale package assembly methods.